1. Field of the Invention
The present invention relates to a semiconductor device and especially to a composition of the passivation layer in the semiconductor device.
2. Description of the Related Art
FIG. 5 shows a structural cross sectional view of a semiconductor device using a conventional passivation layer. The metal wire 14 is fabricated after the interlayer dielectric layer 12 is accumulated on the transistor 11. The contact hole 13 is provided at a desired position of the transistor through the interlayer dielectric layer and a gate oxide layer of the transistor. The phosphorus silicate glass (PSG) layer 15 is removed at the pad portion 16 for contacting with the outside after the PSG layer 15 is accumulated. After that the P-SiN layer 17 is removed at the pad portion 16 after the P-SiN layer 17 is accumulated.
As described above, the double-layer composed of the PSG layer and P-SiN layer has been used in many of the semiconductor integrated circuits. Reasons for using the double-layer composed of the PSG layer and P-SiN layer are as follows:
(1) The thick PSG layer (0.5-2 .mu.m) protects the semiconductor surface from contamination by the alkaline metals and damage caused by foreign substance. PA1 (2) The P-SiN layer protects the semiconductor integrated circuit from penetration of moisture.
The P-SiN layer is well-known as the passivation layer for protecting the semiconductor integrated circuit from moisture. However, it has recently been found that the presence of P-SiN accelerates the deterioration of the MOS transistor caused by hot electrons. A distinctive deterioration by the hot electrons results from the blocking P-SiN layer diffusion of hydrogen out of the semiconductor integrated circuit, though the P-SiN layer is good for protecting the transistor from the penetration of moisture.
Hydrogen which is taken into the semiconductor integrated circuit is produced in various processes of the semiconductor integrated circuit manufacturing. In particular, abundant hydrogen is produced when hydrogen annealing is performed or P-SiN is produced in the process of the CVD method using a hydrogen compound. This hydrogen is thought to cause a hot electron trap in the gate oxide layer. Thus, if the P-SiN is used as a passivation material, there remains a problem of preventing the composition of the passivation layer protecting the MOS transistor from preventing the deterioration by the hot electrons.